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?2015 fairchild semiconductor corporation 1 www.fairchildsemi.com FNA23060 rev. 1.0 FNA23060 600 v motion spm? 2 series august 2015 FNA23060 600 v motion spm ? 2 series features ? ul certified no. e209204 (ul1557) ? 600 v - 30 a 3-phase igbt inverter, including control ics for gate drive and protections ? low-loss, short-circuit-rated igbts ? very low thermal resistance using al 2 o 3 dbc substrate ? built-in bootstrap diodes and dedicated vs pins simplify pcb layout ? separate open-emitter pins from low-side igbts for three-phase current sensing ? single-grounded power supply supported ? built-in ntc thermistor for temperature monitoring and management ? adjustable over-current protection via integrated sense-igbts ? isolation rating of 2500 vrms / 1 min. applications ? motion control - industrial motor (ac 200 v class) related resources ? an-9121 - users guide for 600v spm ? 2 series ? an-9076 - mounting guide for new spm ? 2 package ? an-9079 - thermal performance of motion spm ? 2 series by mounting torque general description the FNA23060 is a motion spm ? 2 module providing a fully-featured, high-performance inverter output stage for ac induction, bldc, and pm sm motors. these modules integrate optimized gate drive of the built-in igbts to minimize emi and losses, while also providing multiple on-module protection features: under-voltage lockouts, over-current shutdown, temperature sensing, and fault reporting. the built-in, high-speed hvic requires only a single supply voltage and translates the incoming logic- level gate inputs to high-voltage, high-current drive signals to properly drive the module's internal igbts. separate negative igbt terminals are available for each phase to support the widest variety of control algorithms. figure 1. 3d package drawing (click to activate 3d content) package marking and ordering inform ation device device marking package packing type quantity FNA23060 FNA23060 spmca-a34 rail 6
?2015 fairchild semiconductor corporation 2 www.fairchildsemi.com FNA23060 rev. 1.0 FNA23060 600 v motion spm? 2 series intergrated power functions ? 600 v - 30 a igbt inverter for three-phase dc / ac power conversion ( refer to figure 3 ) intergrated drive, protection, and system control functions ? for inverter high-side igbts: gate-drive circuit, hi gh-voltage isolated high-speed level-shifting control circuit, under-voltage lock-out protection (uvlo), available bootstrap circuit exampl e is given in figures 5 and 15. ? for inverter low-side igbts: gate-drive circui t, short-circuit protection (scp) control circuit, under-voltage lock-out protection (uvlo) ? fault signaling: corresponding to uv (low-side supply) and sc faults ? input interface: active-high interface, wor ks with 3.3 / 5 v logic, schmitt-trigger input pin configuration figure 2. top view (34) v s(w) (33) v b(w) (31) v cc(wh) (30) in (wh) (29) v s(v) (28) v b(v) (26) v cc(vh) (25) in (vh) (24) v s(u) (23) v b(u) (21) v cc(uh) (20) com (h) (19) in (uh) (18) r sc (17) c sc (16) c fod (15) v fo (12) in (ul) (13) in (vl) (14) in (wl) (10) vcc (l) (11) com (l) (22) v bd(u) (27) v bd(v) (32) v bd(w) (1) p (2) w (3) v (4) u (5) n w (6) n v (7) n u (8) r th (9) v th case temperature (t c ) detecting point
?2015 fairchild semiconductor corporation 3 www.fairchildsemi.com FNA23060 rev. 1.0 FNA23060 600 v motion spm? 2 series pin descriptions pin number pin name pin description 1 p positive dc-link input 2 w output for w phase 3 v output for v phase 4 u output for u phase 5n w negative dc-link input for w phase 6n v negative dc-link input for v phase 7n u negative dc-link input for u phase 8r th series resistor for thermistor (temperature detection) 9v th thermistor bias voltage 10 v cc(l) low-side bias voltage for ic and igbts driving 11 com (l) low-side common supply ground 12 in (ul) signal input for low-side u phase 13 in (vl) signal input for low-side v phase 14 in (wl) signal input for low-side w phase 15 v fo fault output 16 c fod capacitor for fault output duration selection 17 c sc capacitor (low-pass filter) for shor t-circuit current detection input 18 r sc resistor for short-circuit current detection 19 in (uh) signal input for high-side u phase 20 com (h) high-side common supply ground 21 v cc(uh) high-side bias voltage for u phase ic 22 v bd(u) anode of bootstrap diode for u phas e high-side bootstrap circuit 23 v b(u) high-side bias voltage for u phase igbt driving 24 v s(u) high-side bias voltage ground fo r u phase igbt driving 25 in (vh) signal input for high-side v phase 26 v cc(vh) high-side bias voltage for v phase ic 27 v bd(v) anode of bootstrap diode for v phase high-side bootstrap circuit 28 v b(v) high-side bias voltage for v phase igbt driving 29 v s(v) high-side bias voltage ground for v phase igbt driving 30 in (wh) signal input for high-side w phase 31 v cc(wh) high-side bias voltage for w phase ic 32 v bd(w) anode of bootstrap diode for w phase high-side bootstrap circuit 33 v b(w) high-side bias voltage for w phase igbt driving 34 v s(w) high-side bias voltage ground for w phase igbt driving
?2015 fairchild semiconductor corporation 4 www.fairchildsemi.com FNA23060 rev. 1.0 FNA23060 600 v motion spm? 2 series internal equivalent circ uit and input/output pins figure 3. internal block diagram notes: 1. inverter high-side is composed of three normal-igbts, freewheeling diodes, and one control ic for each igbt. 2. inverter low-side is composed of three sense-igbts, freewheeling diodes, and one control ic for each igbt. it has gate drive and protection functions. 3. inverter power side is composed of four inverter dc-link input terminals and three inverter output terminals.
?2015 fairchild semiconductor corporation 5 www.fairchildsemi.com FNA23060 rev. 1.0 FNA23060 600 v motion spm? 2 series absolute maximum ratings (t j = 25c, unless otherwise specified.) inverter part control part bootstrap diode part total system thermal resistance notes: 4. these values had been made an acquisition by the calculation considered to design factor. 5. for the measurement point of case temperature (t c ), please refer to figure 2 . symbol parameter conditions rating unit v pn supply voltage applied between p - n u , n v , n w 450 v v pn(surge) supply voltage (surge) applied between p - n u , n v , n w 500 v v ces collector - emitter voltage 600 v i c each igbt collector current t c = 25c, t j ?? 150c (note 4) 30 a i cp each igbt collector current (peak) t c = 25c, t j ? 150c, under 1 ms pulse width (note 4) 60 a p c collector dissipation t c = 25c per one chip (note 4) 121 w t j operating junction temperature -40 ~ 150 c symbol parameter conditions rating unit v cc control supply voltage applied between v cc(h) , v cc(l) - com 20 v v bs high-side control bias voltage applied between v b(u) - v s(u) , v b(v) - v s(v) , v b(w) - v s(w) 20 v v in input signal voltage applied between in (uh) , in (vh) , in (wh) , in (ul) , in (vl) , in (wl) - com -0.3 ~ v cc +0.3 v v fo fault output supply voltage applied between v fo - com -0.3 ~ v cc +0.3 v i fo fault output current sink current at v fo pin 2 ma v sc current sensing input voltage applied between c sc - com -0.3 ~ v cc +0.3 v symbol parameter conditions rating unit v rrm maximum repetitive reverse voltage 600 v i f forward current t c = 25c, t j ?? 150c (note 4) 1.0 a i fp forward current (peak) t c = 25c, t j ? 150c, under 1 ms pulse width (note 4) 2.0 a t j operating junction temperature -40 ~ 150 c symbol parameter conditions rating unit v pn(prot) self-protection supply voltage limit (short-circuit protection capability) v cc = v bs = 13.5 ~ 16.5 v, t j = 150c, v ces < 600 v, non-repetitive, < 2 ? s 400 v t c module case operation temperature see figure 2 -40 ~ 125 c t stg storage temperature -40 ~ 125 c v iso isolation voltage 60 hz, sinuso idal, ac 1 minute, connection pins to heat sink plate 2500 v rms symbol parameter conditions min. typ. max. unit r th(j-c)q junction-to-case thermal resistance (note 5) inverter igbt part (per 1 / 6 module) - - 1.03 c / w r th(j-c)f inverter fwd part (per 1 / 6 module) - - 1.64 c / w
?2015 fairchild semiconductor corporation 6 www.fairchildsemi.com FNA23060 rev. 1.0 FNA23060 600 v motion spm? 2 series electrical characteristics (t j = 25c, unless otherwise specified.) inverter part note: 6. t on and t off include the propagation delay of the internal drive ic. t c(on) and t c(off) are the switching times of igbt under the given gate-driving condition internally. for the detailed information, please see figure 4 . figure 4. switching time definition symbol parameter conditions min. typ. max. unit v ce(sat) collector - emitter saturation voltage v cc = v bs = 15 v v in = 5 v i c = 30 a, t j = 25c - 1.50 2.10 v v f fwdi forward voltage v in = 0 v i f = 30 a, t j = 25c - 1.80 2.40 v hs t on switching times v pn = 300 v, v cc = 15 v, i c = 30 a t j = 25c v in = 0 v ? 5 v, inductive load see figure 5 (note 6) 0.80 1.30 1.90 ? s t c(on) -0.350.75 ? s t off -1.051.65 ? s t c(off) -0.150.55 ? s t rr -0.20- ? s ls t on v pn = 300 v, v cc = 15 v, i c = 30 a t j = 25c v in = 0 v ? 5 v, inductive load see figure 5 (note 6) 0.60 1.10 1.70 ? s t c(on) -0.300.70 ? s t off -1.151.75 ? s t c(off) -0.150.55 ? s t rr -0.20- ? s i ces collector - emitter leakage current v ce = v ces --5ma v ce i c v in t on t c(on) v in(on) 10% i c 10% v ce 90% i c 100% i c t rr 100% i c v ce i c v in t off t c(off) v in(off) 10% v ce 10% i c (a) turn-on (b) turn-off
?2015 fairchild semiconductor corporation 7 www.fairchildsemi.com FNA23060 rev. 1.0 FNA23060 600 v motion spm? 2 series figure 5. example circuit for switching test figure 6. switching loss ch aracteristics (typical) figure 7. r-t curve of built-in thermistor one-leg diagram of spm 2 p n u,v,w v cc in com v b out v s v cc in com ou t c sc c fo d v fo r sc i c v pn u,v,w inductor hs switching ls switching v 300v v v r bs 15 v 5 v 4.7 k ? c bs hs switching ls switching v in 0 v 5 v v cc -20-10 0 102030405060708090100110120 0 50 100 150 200 250 300 350 400 450 500 550 600 r-t curve resistance[k ? ] temperature t th [] ? ] temperature [ ] r-t curve in 50 ~ 125
?2015 fairchild semiconductor corporation 8 www.fairchildsemi.com FNA23060 rev. 1.0 FNA23060 600 v motion spm? 2 series bootstrap diode part control part notes: 7. short-circuit current protection functions only at the low-sides because the sense current is divided from main current at l ow-side igbts. inserting the shunt resistor for monitoring the phase current at n u , n v , n w terminal, the trip level of the short-circuit current is changed. 8. the fault-out pulse width t fod depends on the capacitance value of c fod according to the following approximate equation : t fod = 0.8 x 10 6 x c fod [s]. 9. t th is the temperature of thermistor itself. to know case temperature (t c ), conduct experiments considering the application. symbol parameter conditions min. typ. max. unit v f forward voltage i f = 1.0 a, t j = 25c - 2.2 - v t rr reverse-recovery time i f = 1.0 a, di f / dt = 50 a / ? s, t j = 25c - 80 - ns symbol parameter conditions min. typ. max. unit i qcch quiescent v cc supply current v cc(uh,vh,wh) = 15 v, in (uh,vh,wh) = 0 v v cc(uh) - com (h) , v cc(vh) - com (h) , v cc(wh) - com (h) --0.15ma i qccl v cc(l) = 15 v, in (ul,vl, wl) = 0 vv cc(l) - com (l) --5.00ma i pcch operating v cc supply current v cc(uh,vh,wh) = 15 v, f pwm = 20 khz, duty = 50%, applied to one pwm signal input for high-side v cc(uh) - com (h) , v cc(vh) - com (h) , v cc(wh) - com (h) --0.30ma i pccl v cc(l) = 15v, f pwm = 20 khz, duty = 50%, applied to one pwm signal input for low-side v cc(l) - com (l) --9.00ma i qbs quiescent v bs supply current v bs = 15 v, in (uh, vh, wh) = 0 v v b(u) - v s(u) , v b(v) - v s(v) , v b(w) - v s(w) --0.30ma i pbs operating v bs supply current v cc = v bs = 15 v, f pwm = 20 khz, duty = 50%, applied to one pwm signal input for high-side v b(u) - v s(u) , v b(v) - v s(v) , v b(w) - v s(w) --6.50ma v foh fault output voltage v cc = 15 v, v sc = 0 v, v fo circuit: 4.7 k ? to 5 v pull-up 4.5 - - v v fol v cc = 15 v, v sc = 1 v, v fo circuit: 4.7 k ? to 5 v pull-up - - 0.5 v i sen sensing current of each sense igbt v cc = 15 v, v in = 5 v, r sc = 0 ?? no connection of shunt resistor at n u,v,w terminal i c = 30 a - 19 - ma v sc(ref) short circuit trip level v cc = 15 v (note 7) c sc - com (l) 0.43 0.50 0.57 v i sc short circuit current level for trip r sc = 20 ? ( 1%) ? no connection of shunt resistor at n u,v,w terminal (note 7) -60- a uv ccd supply circuit under- voltage protection detection level 10.3 - 12.8 v uv ccr reset level 10.8 - 13.3 v uv bsd detection level 9.5 - 12.0 v uv bsr reset level 10.0 - 12.5 v t fod fault-out pulse width c fod = open (note 8) 50 - - ? s c fod = 2.2 nf 1.7 - - ms v in(on) on threshold voltage applied between in (uh, vh, wh) - com (h) , in (ul, vl, wl) - com (l) --2.6v v in(off) off threshold voltage 0.8 - - v r th resistance of thermistor at t th = 25c see figure 7 (note 9) -47-k ? at t th = 100c - 2.9 - k ?
?2015 fairchild semiconductor corporation 9 www.fairchildsemi.com FNA23060 rev. 1.0 FNA23060 600 v motion spm? 2 series recommended oper ating conditions note: 10. this product might not make right output response if input pulse width is less than the recommanded value. figure 8. allowable maximum output current note: 11. this allowable output current value is the reference data for the safe operation of this product. this may be different fro m the actual application and operating condition. symbol parameter conditions value unit min. typ. max. v pn supply voltage applied between p - n u , n v , n w - 300 400 v v cc control supply voltage applied between v cc(uh, vh, wh) - com (h) , v cc(l) - com (l) 14.5 15.0 16.5 v v bs high-side bias voltage applied between v b(u) - v s(u) , v b(v) - v s(v) , v b(w) - v s(w) 13.5 15.0 18.5 v dv cc / dt, dv bs / dt control supply variation -1 - 1 v / ? s t dead blanking time for preventing arm - short for each input signal 1.5 - - ? s f pwm pwm input signal -40 ? c ?? t c ?? 125c, -40 ? c ?? t j ?? 150c - - 20 khz v sen voltage for current sensing applied between n u , n v , n w - com (h, l) (including surge voltage) -5 5 v pw in(on) minimun input pulse width v cc = v bs = 15 v, i c ?? 60 a, wiring inductance between n u, v, w and dc link n < 10nh (note 10) 2.0 - - ? s pw in(off) 2.0 - - t j junction temperature -40 - 150 ? c
?2015 fairchild semiconductor corporation 10 www.fairchildsemi.com FNA23060 rev. 1.0 FNA23060 600 v motion spm? 2 series mechanical characteristics and ratings figure 9. flatness measurement position figure 10. mounting screws torque order notes: 12. do not over torque when mounting screws. too much mounting torque may cause dbc cracks, as well as bolts and al heat-sink d estruction. 13. avoid one-sided tightening stress. figure 10 shows the recommended torque order for the mounting screws. uneven mounting ca n cause the dbc substrate of package to be damaged. the pre-screwing torque is set to 20 ~ 30% of maximum torque rating. parameter conditions min. typ. max. unit device flatness see figure 9 0 - +200 ? m mounting torque mounting screw: m4 see figure 10 recommended 1.0 n ? m 0.9 1.0 1.5 n ? m recommended 10.1 kg ? cm 9.1 10.1 15.1 kg ? cm terminal pulling strength load 19.6 n 10 - - s terminal bending strength load 9.8 n, 90 degrees bend 2 - - times weight -50-g ( ) ( ) 1 2 pre - screwing : 1 2 final screwing : 2 1
?2015 fairchild semiconductor corporation 11 www.fairchildsemi.com FNA23060 rev. 1.0 FNA23060 600 v motion spm? 2 series time charts of spms protective function figure 11. under-voltage protection (low-side) a1 : control supply voltage rises: after the voltage rises uv ccr , the circuits start to operate when the next input is applied. a2 : normal operation: igbt on and carrying current. a3 : under-voltage detection (uv ccd ). a4 : igbt off in spite of control input condition. a5 : fault output operation starts with a fixed pulse widt h according to the condition of the external capacitor c fod . a6 : under-voltage reset (uv ccr ). a7 : normal operation: igbt on and carrying curr ent by triggering next signal from low to high. figure 12. under-voltage protection (high-side) b1 : control supply voltage rises: after the voltage reaches uv bsr , the circuits start to operate when the next input is applied. b2 : normal operation: igbt on and carrying current. b3 : under-voltage detection (uv bsd ). b4 : igbt off in spite of control input c ondition, but there is no fault output signal. b5 : under-voltage reset (uv bsr ). b6 : normal operation: igbt on and carrying curr ent by triggering next signal from low to high. input signal output current fault output signal control supply voltage reset uv ccr protection circuit state set reset uv ccd a1 a3 a2 a4 a6 a5 a7 input signal output current fault output signal control supply voltage reset uv bsr protection circuit state set reset uv bsd b1 b3 b2 b4 b6 b5 high-level (no fault output)
?2015 fairchild semiconductor corporation 12 www.fairchildsemi.com FNA23060 rev. 1.0 FNA23060 600 v motion spm? 2 series figure 13. short-circui t current protection (low-side operation only) (with the external sense resistance and rc filter connection) c1 : normal operation: igbt on and carrying current. c2 : short-circuit current detection (sc trigger). c3 : all low-side igbts gate are hard interrupted. c4 : all low-side igbts turn off. c5 : fault output operation starts with a fixed pulse width according to the condition of the external capacitor c fod . c6 : input high: igbt on state, but during the acti ve period of fault output, the igbt doesn?t turn on. c7 : fault output operation finishes, but igbt doesn?t turn on until triggeri ng the next signal from low to high. c8 : normal operation: igbt on and carrying current. input/output interface circuit figure 14. recommended mcu i/o interface circuit note: 14. rc coupling at each input might change depending on the pwm control scheme used in the application and the wiring impedance of the application?s printed circuit board. the input signal section of the motion spm 2 product integrates 5 k ?? ( typ.) pull-down resistor. therefore, when using an external filtering resistor, please pay attention to the signal voltage drop at input terminal. lower arms control input output current sensing voltage of sense resistor fault output signal sc ref erenc e v olt age rc filter circuit time constant delay sc current trip level protection circuit state set reset c6 c7 c3 c2 c1 c8 c4 c5 internal igbt gate-emitter voltage internal delay at prot ec tion c irc uit mcu com +5v (mcu or control power) ,, in (u l) in (vl) in (wl) ,, in (uh) in (vh) in (w h ) v fo 4.7 k ? spm
?2015 fairchild semiconductor corporation 13 www.fairchildsemi.com FNA23060 rev. 1.0 FNA23060 600 v motion spm? 2 series figure 15. typical application circuit notes: 15. to avoid malfunction, the wiring of each input should be as short as possible (less than 2 - 3 cm). 16. v fo output is an open-drain type. this signal line should be pulled up to the positive side of the mcu or control power supply wit h a resistor that makes i fo up to 2 ma. please refer to figure 14 . 17. fault out pulse width can be adjust by capacitor c 5 connected to the c fod terminal. 18. input signal is active-high type. there is a 5 k ? resistor inside the ic to pull-down each input signal line to gnd. rc coupling circuits should be adopted for the prevention of input signal oscillation. r 1 c 1 time constant should be selected in the range 50 ~ 150 ns ( recommended r 1 = 100 ? , c 1 = 1 nf). 19. each wiring pattern inductance of point a should be minimized (recommend less than 10 nh). use the shunt resistor r 4 of surface mounted (smd) type to reduce wiring inductance. to prevent malfunction, wiring of point e should be connected to the terminal of the shunt resistor r 4 as close as possible. 20. to insert the shunt resistor to measure each phase current at n u , n v , n w terminal, it makes to change the trip level i sc about the short-ciruit current. 21. to prevent errors of the protection function, the wiring of points b, c, and d should be as short as possible. the wiring o f b between c sc filter and r sc terminal should be divided at the point that is close to the terminal of sense resistor r 5 . 22. for stable protection function, use the sense resistor r 5 with resistance variation within 1% and low inductance value. 23. in the short-circuit protection circuit, select the r 6 c 6 time constant in the range 1.0 ~ 1.5 ? s. r 6 should be selected with a minimum of 10 times larger resistance than sense resistor r 5 . do enough evaluaiton on the real system be cause short-circuit protection time may va ry wiring pattern layout and value of the r 6 c 6 time constant. 24. each capacitor should be mounted as close to the pins of the motion spm ? 2 product as possible. 25. to prevent surge destruction, the wiring between the smoothing capacitor c 7 and the p & gnd pins should be as short as possible. the use of a high-frequency non-inductive capacitor of around 0.1 ~ 0.22 ? f between the p & gnd pins is recommended. 26. relays are used in most systems of electrical equipments in in dustrial application. in these cases, there should be suffic ient distance between the mcu and the relays. 27. the zener diode or transient voltage suppressor should be adapted for the protection of ics from the surge destruction betw een each pair of control supply terminals (recommanded zener diode is 22 v / 1 w, which has the lower zener impedance characteristic than about 15 ? ). 28. c 2 of around seven times larger than bootstrap capacitor c 3 is recommended. 29. please choose the electrolytic capacito r with good temperature characteristic in c 3 . choose 0.1 ~ 0.2 ? f r-category ceramic capacitors with good temperature and frequency characteristics in c 4 . fault c 3 c 4 c 3 c 4 c 3 c 4 c 2 c 4 r 3 c 1 r 1 m v dc c 7 gating uh gating vh gati ng wh gati ng w l gati ng vl gating ul c 1 m c u r 4 r 4 r 4 w-phase current v-phase current u-phase current r 6 c 6 r 1 r 1 r 1 r 1 r 1 r 1 c 1 c 1 c 1 c 1 c 1 c 1 r 7 5v l ine lvic com v cc in in in v fo c sc out out out w (2) p ( 1 ) (24) v s( u ) (23) v b(u) (29) v s(v) (28) v b(v ) (17) c sc (15 ) v fo (14 ) i n (wl ) (13) in (vl) (12) in (u l) hvic v b out in (25) in (v h ) (10 ) v cc(l) (19) in (u h) (34 ) v s(w) (33) v b( w) (21) v cc(uh) (30 ) i n (wh) thermistor v s (11 ) c om (l) v cc com c fod n u (7) n v (6) n w (5 ) u (4) v (3 ) (8 ) r th (9) v th (16 ) c fo d r sc (18 ) (20) com (h ) (22) v bd(u ) (26) v cc(vh ) (27 ) v bd (v ) (31) v cc(w h ) (32 ) v bd (w ) hvic v b out in v s v cc com hvic v b out in v s v cc com 15 v li ne c 5 5v l ine temp. monitor ing r 5 e c 4 c 4 c 4 r 2 r 2 r 2 sense resistor shunt resistor a b c d control gnd li ne power gnd line
?2015 fairchild semiconductor corporation 14 www.fairchildsemi.com FNA23060 rev. 1.0 FNA23060 600 v motion spm? 2 series detailed package outlin e drawings (FNA23060) package drawings are provided as a servic e to customers considering fairchild co mponents. drawings may change in any manner without notice. please note the revision and/or data on the drawing and contact a fairchildsemicondu ctor representative to veri fy or obtain the most recent revision. package s pecifications do not expand the terms of fa irchild?s worldwide therm and conditions, specifically the the warranty therei n, which covers fairchild products. always visit fairchild semiconduct or?s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/dwg/mo/mod34ba.pdf
?2015 fairchild semiconductor corporation 15 www.fairchildsemi.com FNA23060 rev. 1.0

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